描述

The FDG6303N is a dual N-Channel, logic-level enhancement mode FET utilizing high cell density DMOS technology to minimize on-state resistance. This device is rated for a drain-source voltage of 25V and handles a continuous drain current of 0.5A, featuring a low on-state resistance of 0.45 Ω at a 4.5V gate drive. Its very low gate threshold voltage (VGS(th) < 1.5V) allows for direct operation in 3V circuits, and an integrated Gate-Source Zener provides ESD protection over 6kV (HBM). Housed in a compact SC70-6 surface-mount package, the FDG6303N is an ideal replacement for bipolar digital transistors and small-signal MOSFETs in low-voltage systems.